If anyone is wandering, this is just to help me revise
Launch a question at me on MSN
1. Select UP TO three statements that are TRUE of von Neumann architecture
[3 Marks]
a) Many computers today are based on Von Neumann architecture
b) Decreasing gap between speed of CPU and RAM + other components
c) Multiple Instruction, Multiple Data is typical of von Neumann architecture
d) Von Neumann architecture relies on separate caches for data and instructions
e) Multiple processors lessen the effect of the von Neumann bottleneck
f) Cache memory makes the bottleneck worse
g) Pipelining makes the bottleneck better
2. ************** means tasks running in parallel, often 1 CPU switching between tasks
[2 Marks]
3. Referring to computer caches
a)If a block can be placed anywhere in the cache, the cache is said to be
Direct mapped
Set associative
Fully associative
4. In a simple computer, cache size = 32 bytes, main memory = 128 bytes. Locations accessed in this order: 19, 20, 22, 23, 24, 1, 6, 7, 16, 81, 87, 2, 1
(assume blocks begin on multiples, e.g. for block size = 2, blocks would begin at addresses 0, 2, 4, etc)
a) What is the largest block size that results in no blocks having to be replaced from main memory? [ x ] bytes
[5 Marks]
b) How many misses would occur if the block size were 16 bytes and locations were accessed in this order: 19, 20, 22, 23, 24, 1, 6, 7, 16, 81, 87, 2, 1
[ x ] misses
[5 Marks]
5. There are three steps that every processor does:
1) ? the instruction,
2) ? the instruction, and
3) ? it
[3 Marks]
6. Select TRUE or FALSE for each of the following statements
[12 Marks]
(multi-choice (TRUE/FALSE/Don’t Know) type question – correct selection gets 1 mark, ‘don’t know’ gets 0, a wrong answer gets –1, so be careful with this sort of question!)
a) The ‘Boot’ section resides in RAM
b) ROM is often used to hold programs for embedded systems
c) ROM stands for Read Only Memory
d) In RAM the order of access to different locations does not affect speed of access
e) Dynamic RAM is the most common type of memory in use today
f) In DRAM a fast register holds the information
g) DRAM has to be refreshed all of the time or it forgets what it is holding
h) SRAM is much smaller than DRAM, as the transistors take up less space
i) DRAM is used for the speed-critical parts (eg cache)
j) DRAM is more expensive than SRAM
k) ROM is a type of data storage device, which is manufactured with fixed contents
l) It retains its contents until the power is switched off
m) ‘register’ : One of a small number of high-speed memory locations in a computer's CPU
n) There is always one register per main memory location, for addressing purposes
o) A register may be directly addressed with a few bits
p) The CPU is the Control Parity Unit
q) It has been replaced on most modern machines by a pipelined stack
r) ALU is the Arithmetic and Logic Unit
s) It is the ‘calculator’ in the processor
t) It cannot perform Boolean Algebra
u) Because of the increasing complexity in modern machines, low-level languages, such as 8086 have to be run on special co-processors
v) A parallel computer has several processors, which may share other resources such as memory and peripherals
w) Pipelining leads to dramatic improvements in system performance, allowing much of the processor circuitry to lie idle
x) In a pipelined architecture, instruction execution overlaps
7) Complete the following sentence:
"A program spends [ x ] % of its time in [ x ] % of its code"
[2 Marks]
8) Complete the following sentence:
?? locality means that recently accessed items are likely to be accessed in the near future.
[2 Marks]
9) Complete the following sentence:
?? locality means that items whose addresses are near one another tend to be referenced close together in time
[2 Marks]
http://www.digitalbrain.com/vaseys/University/Computing/Year%202/ADCAR/?verb=list
Frozen white Fiesta ST you see this name you think dirty
focus at 17 (i'm now 21) i've wanted one... so i shall get one as a prezzie for finishing Uni (hopefully summer 2008) then go on a trip around Europe. 
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